Design methodology and communication architectures for coarse grain processors in an MP-SoC environement
| dc.contributor.author | Marescaux, Theodore | |
| dc.date.accessioned | 2021-10-16T03:16:35Z | |
| dc.date.available | 2021-10-16T03:16:35Z | |
| dc.date.issued | 2005 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/10852 | |
| dc.source | IIOimport | |
| dc.title | Design methodology and communication architectures for coarse grain processors in an MP-SoC environement | |
| dc.type | Oral presentation | |
| dc.source.peerreview | no | |
| dc.source.conference | International Symposium on Advanced Reconfigurable Systems | |
| dc.source.conferencedate | 15/12/2005 | |
| dc.source.conferencelocation | Kyoto Japan | |
| imec.availability | Published - imec | |
| imec.internalnotes | Invited talk |
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