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Process characterization and reliability issues of three dimension-stacked integrated circuit (3D-SIC) structures

dc.contributor.authorYang, Yu
dc.date.accessioned2021-10-19T00:41:12Z
dc.date.available2021-10-19T00:41:12Z
dc.date.issued2010-11
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/18380
dc.sourceIIOimport
dc.titleProcess characterization and reliability issues of three dimension-stacked integrated circuit (3D-SIC) structures
dc.typePHD thesis
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.contributor.thesisadvisorVerlinden, Albert
dc.contributor.thesisadvisorVan Hoof, Chris
imec.availabilityPublished - open access


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