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Architectures for digital intensive transmitters in nanoscale CMOS

dc.contributor.authorIngels, Mark
dc.date.accessioned2021-10-21T08:26:03Z
dc.date.available2021-10-21T08:26:03Z
dc.date.issued2013
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/22521
dc.sourceIIOimport
dc.titleArchitectures for digital intensive transmitters in nanoscale CMOS
dc.typeBook chapter
dc.contributor.imecauthorIngels, Mark
dc.contributor.orcidimecIngels, Mark::0000-0003-1939-2422
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage311
dc.source.bookFrequency References, Power Management for SOC, and Smart Wireless Interfaces
dc.source.endpage329
imec.availabilityPublished - open access
imec.internalnotesISBN 978-3-319-010180-9


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