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Strength and Reliability Characterization of Multi-Level Back-End-of-Line under Chip Package Interaction Loading

dc.contributor.authorKljucar, Luka
dc.date.accessioned2021-10-24T06:59:42Z
dc.date.available2021-10-24T06:59:42Z
dc.date.issued2017-12
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/28690
dc.sourceIIOimport
dc.titleStrength and Reliability Characterization of Multi-Level Back-End-of-Line under Chip Package Interaction Loading
dc.typePHD thesis
dc.contributor.imecauthorKljucar, Luka
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.contributor.thesisadvisorDe Wolf, Ingrid
dc.contributor.thesisadvisorWevers, Martine
dc.identifier.urlhttps://limo.libis.be/primo-explore/fulldisplay?docid=LIRIAS1941849&context=L&vid=Lirias&search_scope=Lirias&tab=default_tab&lang=en_US&fromSitemap=1
imec.availabilityPublished - open access


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