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Vertical Transistors: a Slippery Path towards the Ultimate CMOS Scaling

dc.contributor.authorYakimets, Dmitry
dc.date.accessioned2021-10-24T19:31:41Z
dc.date.available2021-10-24T19:31:41Z
dc.date.issued2017-01
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/29982
dc.sourceIIOimport
dc.titleVertical Transistors: a Slippery Path towards the Ultimate CMOS Scaling
dc.typePHD thesis
dc.contributor.imecauthorYakimets, Dmitry
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.contributor.thesisadvisorDe Meyer, Kristin
dc.contributor.thesisadvisorCollaert, Nadine
dc.identifier.urlhttps://limo.libis.be/primo-explore/fulldisplay?docid=LIRIAS1736137&context=L&vid=Lirias&search_scope=Lirias&tab=default_tab&lang=en_US&fromSitemap=1
imec.availabilityPublished - open access


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