Study on Process Induced out-of-plane deformation for Fan-Out Wafer Level Packaging

Abstract

Fan-Out Wafer-Level-Packaging (FOWLP) has an increased interest because of its lower cost substrate-less and lower footprint driven by the need for higher-density, higher-bandwidth chip-to-chip connections. However, FOWLP process is facing many challenges such as wafer warpage and die shift. Wafer warpage occurs mainly when the temperature changes during processes, due to the mismatch in the coefficient of thermal expansion (CTE) of the constituent materials. Large warpage of the reconstructed wafers leads to difficulties in wafer handling and tool limitations.

This study aims to investigate the evolution of wafer-level warpage during FOWLP process. A Finite Element (FE) model considering the viscoelastic behavior of the mold and adhesive materials is presented. The linear viscoelastic behavior of the mold is characterized using nano dynamic mechanical analysis in a frequency domain at different temperatures. The obtained materials properties were validated using FE modelling and warpage measurements of molded wafers during a heating/cooling experiment.