EUV low-n attenuated phase-shift mask on random logic Via single patterning at pitch 36nm

Abstract

Imec N3 logic design rules define a minimum via pitch of 36nm for a double patterning process. Enabling this pitch is crucial in terms of process time and number of masks involved. One method for extending 0.33 NA EUV is using advanced mask materials. Studies have shown that a low-n attenuated phase-shift mask (PSM) can improve EUV imaging performance, reduce mask 3D effects and improve optical contrast compared to the reference Ta-based mask.([1-3])

In this paper, the impact of mask stack - Ta-based (binary or BIM) and low-n (PSM) - and mask tone - dark field (DF) vs. bright field (BF) - on a random logic Via layer will be evaluated. To pattern contact holes, we use negative tone development (NTD) metal-oxide resist process using the BF mask and positive tone development (PTD) chemically amplified resist process using the DF mask. Source mask optimization (SMO) was performed with and without sub-resolution assist feature (SRAF) as a resolution enhancement technology (RET). Optical proximity correction (OPC) was carried out on design clips using respective sources and mask rules at different mask tone. We show the optimum choice for this layer and present our recommendation based on current OPC simulations as well as some preliminary wafer data.