Show simple item record

dc.contributor.authorKim, Donguk
dc.contributor.authorKim, Je-Hyuk
dc.contributor.authorChoi, Woo Sik
dc.contributor.authorYang, Tae Jun
dc.contributor.authorJang, Jun Tae
dc.contributor.authorBelmonte, Attilio
dc.contributor.authorRassoul, Nouredine
dc.contributor.authorSubhechha, Subhali
dc.contributor.authorDelhougne, Romain
dc.contributor.authorKar, Gouri Sankar
dc.contributor.authorLee, Wonsok
dc.contributor.authorCho, Min Hee
dc.contributor.authorHa, Daewon
dc.contributor.authorKim, Dae Hwan
dc.date.accessioned2023-03-30T10:47:43Z
dc.date.available2022-11-28T03:11:41Z
dc.date.available2023-03-30T10:47:43Z
dc.date.issued2022
dc.identifier.issn2045-2322
dc.identifier.otherWOS:000882475500072
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/40793.3
dc.sourceWOS
dc.titleDevice modeling of two-steps oxygen anneal-based submicron InGaZnO back-end-of-line field-effect transistor enabling short-channel effects suppression
dc.typeJournal article
dc.contributor.imecauthorBelmonte, Attilio
dc.contributor.imecauthorRassoul, Nouredine
dc.contributor.imecauthorSubhechha, Subhali
dc.contributor.imecauthorDelhougne, Romain
dc.contributor.imecauthorKar, Gouri Sankar
dc.contributor.orcidimecRassoul, Nouredine::0000-0001-9489-3396
dc.contributor.orcidimecSubhechha, Subhali::0000-0002-1960-5136
dc.date.embargo2022-11-12
dc.identifier.doi10.1038/s41598-022-23951-x
dc.source.numberofpages13
dc.source.peerreviewyes
dc.source.beginpageArt. 19380
dc.source.endpagena
dc.source.journalSCIENTIFIC REPORTS
dc.identifier.pmidMEDLINE:36371536
dc.source.issuena
dc.source.volume12
imec.availabilityPublished - open access
dc.description.wosFundingTextThis work was supported in part by Samsung Electronics Co., Ltd under Grant IO200424-07306-01, in part by the National Research Foundation of Korea (NRF) funded by the Ministry of Science and ICT (MSIT) of Korea Government under Grant 2016R1A5A1012966 and 2020R1A2B5B01001979, and in part by the Institute of Information and Communications Technology Planning and Evaluation (IITP) funded by the Korea government (MSIT) under grant 2021-0-01764. Submicron IGZO FET samples was fabricated by imec. TCAD simulation was supported by SILVACO. The EDA tool was supported by the IC Design Education Center (IDEC), south Korea.


Files in this item

Thumbnail

This item appears in the following collection(s)

Show simple item record

VersionItemDateSummary

*Selected version