Notice

This item has not yet been validated by imec staff.

Notice

This is not the latest version of this item. The latest version can be found at: https://imec-prod.atmire.com/handle/20.500.12860/42389.3

Show simple item record

CMOS Device Scaling by Nanosheet Channel Architectures and New Channel Materials

dc.contributor.authorHoriguchi, Naoto
dc.date.accessioned2023-08-24T17:41:48Z
dc.date.available2023-08-24T17:41:48Z
dc.date.issued2023
dc.identifier.issn2161-4636
dc.identifier.otherWOS:001035434300001
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/42389
dc.sourceWOS
dc.titleCMOS Device Scaling by Nanosheet Channel Architectures and New Channel Materials
dc.typeProceedings paper
dc.contributor.imecauthorHoriguchi, Naoto
dc.contributor.orcidimecHoriguchi, Naoto::0000-0001-5490-0416
dc.identifier.eisbn978-4-86348-808-3
dc.source.numberofpages2
dc.source.peerreviewyes
dc.source.beginpage1
dc.source.endpage2
dc.source.conference26th Silicon Nanoelectronics Workshop (SNW)
dc.source.conferencedateJUN 11-12, 2023
dc.source.conferencelocationKyoto
imec.availabilityUnder review


Files in this item

FilesSizeFormatView

There are no files associated with this item.

This item appears in the following collection(s)

Show simple item record

Version history

VersionItemDateSummary
320.500.12860/42389.32023-12-12T10:46:21Zvalidation by library/open access desk
220.500.12860/42389.22023-08-26T19:45:14Zvalidation by imec author
120.500.12860/42389*2023-08-24T17:41:48Z

*Selected version