Dual-logic-in-memory implementation with orthogonal polarization of van der Waals ferroelectric heterostructure
| dc.contributor.author | Niu, Jingjie | |
| dc.contributor.author | Jeon, Sumin | |
| dc.contributor.author | Kim, Donggyu | |
| dc.contributor.author | Baek, Sungpyo | |
| dc.contributor.author | Yoo, Hyun Ho | |
| dc.contributor.author | Li, Jie | |
| dc.contributor.author | Park, Ji-Sang | |
| dc.contributor.author | Lee, Yoonmyung | |
| dc.contributor.author | Lee, Sungjoo | |
| dc.date.accessioned | 2024-09-24T09:37:09Z | |
| dc.date.available | 2023-11-12T17:45:48Z | |
| dc.date.available | 2024-09-24T09:37:09Z | |
| dc.date.issued | 2024 | |
| dc.identifier.issn | 2567-3165 | |
| dc.identifier.other | WOS:001091900700001 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/43144.2 | |
| dc.source | WOS | |
| dc.title | Dual-logic-in-memory implementation with orthogonal polarization of van der Waals ferroelectric heterostructure | |
| dc.type | Journal article | |
| dc.contributor.imecauthor | Li, Jie | |
| dc.date.embargo | 2023-11-02 | |
| dc.identifier.doi | 10.1002/inf2.12490 | |
| dc.source.numberofpages | 11 | |
| dc.source.peerreview | yes | |
| dc.source.beginpage | Art. e12490 | |
| dc.source.endpage | N/A | |
| dc.source.journal | INFOMAT | |
| dc.source.issue | 2 | |
| dc.source.volume | 6 | |
| imec.availability | Published - open access | |
| dc.description.wosFundingText | This research was supported by the Basic Science Research Program through the National Research Foundation of Korea and was funded by the Korean government (MSIP) (Grant Nos. RS-2023-00281048, 2022R1A2C3003068, 2022M3F3A2A01072215). This study was supported by Samsung Electronics Co., Ltd. (IO201215-08197-01). |