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Gate-level characterization and reduction of substrate noise in digital integrated circuits

dc.contributor.authorBadaroglu, Mustafa
dc.date.accessioned2021-10-15T12:39:41Z
dc.date.available2021-10-15T12:39:41Z
dc.date.issued2004-09
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/8505
dc.sourceIIOimport
dc.titleGate-level characterization and reduction of substrate noise in digital integrated circuits
dc.typePHD thesis
dc.contributor.imecauthorBadaroglu, Mustafa
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.contributor.thesisadvisorDe Man, Hugo
dc.contributor.thesisadvisorGielen, Georges
imec.availabilityPublished - open access


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